Digital Systems

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Objectives

- Use binary number systems and binary arithmetic.
- Derive, manipulate and minimize boolean functions.
- Implement boolean functions with circuits with logic gates.
- Understand the operation of the fundamental building blocks of combinational circuits.
- Understand the operation of basic memory elements, and work with registers and counters.
- Specify and synthesize synchronous sequential circuits.
- Understand basic timing issues, including clocking, timing constraints, and propagation delays.
- Design low-complexity digital systems with both combinational and sequential components.

Program

Binary number system, arithmetic operations, decimal and alphanumeric codes.
Logic circuits: binary logic and gates, Boolean algebra, logic functions, standard forms, incompletely specified functions, algebraicand map minimization, circuits with NAND and NOR gates.
Elementary technology elements: logic families, tri-state gates, propagation delays.
Combinational circuits: encoders, decoders, multiplexers, demultiplexers, comparators, adders and subtractors.
Sequential circuits: latches and flip-flops, timing analysis and timing synchronization.
Registers and Counters: registers, shift registers, counters, counter interconnection and expansion.
Synchronous sequential circuits: Mealy and Moore models, state diagrams and state tables, state encoding, classical synthesis,alternative synthesis methods, state minimization.
Memories: RAM, ROM and PROM.

Teaching Methodologies

50% continuous evaluation / 50% non-continuous evaluation

Bibliography

- Digital Design: With an Introduction to the Verilog HDL, VHDL, and SystemVerilog, M. Morris Mano, Michael D. Ciletti, 2018,Pearson;
- Arquitectura de Computadores: dos Sistemas Digitais aos Microprocessadores, Guilherme Arroz, José Monteiro, Arlindo Oliveira,2019, ISTPress

Code

0104067

ECTS Credits

6

Classes

  • Práticas e Laboratórios - 28 hours
  • Teóricas - 28 hours

Evaluation Methodology

  • Continuous evaluation: 50%
  • Non-continuous evaluation: 50%